spade - logo

INTRODUCTION

back up level home
marker SPADE is a scalable parallel architecture with support to NORMA, CC-NUMA, COMA models. It's based on commodity single/multiple CPU processing elements (Servers, Workstations. High-end PC's) and commodity interconnection networks (FastEthernet, ATM, SCI, Myrinet). In order to provide efficient implementation of shared memory model, as well as fast message passing, we are developing custom interconnection systems with hardware support for remote memory access. Two versions of these interconnection systems are being developed:
marker Interconnection network based on PCI network adapter with remote memory access capability; 8 ports Switch with multicast capability; and high speed 66 MBytes/s LVDS links with parallel cables;
marker Interconnection network based on ATM standard but optimized for low latency, high throughput, reliable delivery, multicast and no cell loss flow control.
marker Interconnection network based on SCI standard with support to remote memory access
marker We also are implementing several prototypes of clusters:
marker Efficient support for message passing and shared memory
marker Fast message passing based on active messages and user level access protocols: LSI-EPUSP FULL, based on Berkeley VIA and NIST M-VIA.
marker Operating Systems: LINUX, Windows NT
marker Software DSM: Tread Marks and Brazos
marker Hardware support for fast synchronization
marker Version 1: Processing elements + standard LAN adapters and switches (Fast Ethernet, ATM, Myrinet)
marker Version 2: Processing elements + dedicated interconnection systems
marker Processing elements: Single/multi CPU's (Pentium Pro and Alpha) PCI bus

System Info | Research | User's Info | People | Other | Partnership | Contact

lsi - logo usp - logo